? semiconductor components industries, llc, 2015 january, 2014 ? rev. 8 1 publication order number: NDF02N60Z/d NDF02N60Z, ndd02n60z n-channel power mosfet 600 v, 4.8 features ? low on resistance ? low gate charge ? esd diode ? protected gate ? 100% avalanche tested ? these devices are pb ? free, halogen free/bfr free and are rohs compliant absolute maximum ratings (t c = 25 c unless otherwise noted) rating symbol ndf ndd unit drain ? to ? source voltage v dss 600 v continuous drain current r jc (note 1) i d 2.4 2.2 a continuous drain current r jc t a = 100 c (note 1) i d 1.6 1.4 a pulsed drain current, v gs @ 10 v i dm 10 9 a power dissipation r jc p d 24 57 w gate ? to ? source voltage v gs 30 v single pulse avalanche energy, i d = 2.4 a e as 120 mj esd (hbm) (jesd 22 ? a114) v esd 2500 v rms isolation voltage (t = 0.3 sec., r.h. 30%, t a = 25 c) (figure 17) v iso 4500 v peak diode recovery (note 2) dv/dt 4.5 v/ns continuous source current (body diode) i s 2.4 a maximum temperature for soldering leads t l 260 c operating junction and storage temperature range t j , t stg ? 55 to 150 c stresses exceeding those listed in the maximum ratings table may damage the device. if any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. 1. limited by maximum junction temperature 2. i sd = 2.4 a, di/dt 100 a/ s, v dd bv dss , t j = +150 c www. onsemi.com v dss r ds(on) (max) @ 1 a 600 v 4.8 n ? channel g (1) d (2) s (3) ndd02n60zt4g dpak case 369aa 1 2 3 4 ndd02n60z ? 1g ipak case 369d 1 2 3 4 see detailed ordering, marking and shipping information on page 7 of this data sheet. ordering and marking information 1 2 3 NDF02N60Zg, NDF02N60Zh to ? 220fp case 221ah
NDF02N60Z, ndd02n60z www. onsemi.com 2 thermal resistance parameter symbol value unit junction ? to ? case (drain) NDF02N60Z ndd02n60z r jc 4.9 2.2 c/w junction ? to ? ambient steady state (note 3) NDF02N60Z (note 4) ndd02n60z (note 3) ndd02n60z ? 1 r ja 51 41 80 3. insertion mounted 4. surface mounted on fr4 board using 1 sq. pad size, (cu area = 1.127 in sq [2 oz] including traces). electrical characteristics (t j = 25 c unless otherwise noted) characteristic test conditions symbol min typ max unit off characteristics drain ? to ? source breakdown voltage v gs = 0 v, i d = 1 ma bv dss 600 v breakdown voltage temperature coeffi- cient reference to 25 c, i d = 1 ma bv dss / t j 0.6 v/ c drain ? to ? source leakage current v ds = 600 v, v gs = 0 v 25 c i dss 1 a 150 c 50 gate ? to ? source forward leakage v gs = 20 v i gss 10 a on characteristics (note 5) static drain ? to ? source on ? resistance v gs = 10 v, i d = 1.0 a r ds(on) 4.0 4.8 gate threshold voltage v ds = v gs , i d = 50 a v gs(th) 3.0 4.0 4.5 v forward transconductance v ds = 15 v, i d = 1.2 a g fs 1.7 s dynamic characteristics input capacitance (note 6) v ds = 25 v, v gs = 0 v, f = 1.0 mhz c iss 215 274 325 pf output capacitance (note 6) c oss 25 34 45 reverse transfer capacitance (note 6) c rss 4.0 7.0 10 total gate charge (note 6) v dd = 300 v, i d = 2.4 a, v gs = 10 v q g 5.0 10 16 nc gate ? to ? source charge (note 6) q gs 1.5 2.4 4.0 gate ? to ? drain (?miller?) charge (note 6) q gd 3.5 5.3 8.0 plateau voltage v gp 6.4 v gate resistance r g 4.9 resistive switching characteristics turn ? on delay time v dd = 300 v, i d = 2.4 a, v gs = 10 v, r g = 5 t d(on) 9.0 ns rise time t r 7.0 turn ? off delay time t d(off) 15 fall time t f 7.0 source ? drain diode characteristics (t c = 25 c unless otherwise noted) diode forward voltage i s = 2.4 a, v gs = 0 v v sd 1.6 v reverse recovery time v gs = 0 v, v dd = 30 v i s = 2.4 a, di/dt = 100 a/ s t rr 240 ns reverse recovery charge q rr 0.7 c product parametric performance is indicated in the electrical characteristics for the listed test conditions, unless otherwise noted. product performance may not be indicated by the electrical characteristics if operated under different conditions. 5. pulse width 380 s, duty cycle 2%. 6. guaranteed by design.
NDF02N60Z, ndd02n60z www. onsemi.com 3 typical characteristics 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 0.0 5.0 10.0 15.0 20.0 25.0 v ds , drain ? to ? source voltage (v) i d , drain current (a) figure 1. on ? region characteristics 7.0 v v gs = 10 v 6.5 v 6.0 v 5.5 v 5.0 v 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 345678910 v gs , gate ? to ? source voltage (v) i d , drain current (a) figure 2. transfer characteristics v ds = 25 v t j = 150 c t j = ? 55 c t j = 25 c 3.75 4.00 4.25 4.50 4.75 5.00 5.25 5.50 5.75 6.00 5.0 5.5 6.0 6.5 7.0 7.5 8.0 8.5 9.0 9.5 10.0 v gs , gate ? to ? source voltage (v) r ds(on) , drain ? to ? source resistance ( ) figure 3. on ? region versus gate ? to ? source voltage i d = 1 a t j = 25 c 3.75 4.00 4.25 4.50 4.75 5.00 5.25 0.0 0.3 0.5 0.8 1.0 1.3 1.5 1.8 2.0 2.3 2.5 v gs = 10 v t j = 25 c i d , drain current (a) figure 4. on ? resistance versus drain current and gate voltage r ds(on) , drain ? to ? source resistance ( ) 0.25 0.50 0.75 1.00 1.25 1.50 1.75 2.00 2.25 2.50 ? 50 ? 25 0 25 50 75 100 125 150 r ds(on) , drain ? to ? source resistance (normalized) i d = 1 a v gs = 10 v t j , junction temperature ( c) figure 5. on ? resistance variation with temperature 0.90 0.95 1.00 1.05 1.10 1.15 ? 50 ? 25 0 25 50 75 100 125 150 t j , junction temperature ( c) figure 6. bv dss variation with temperature bv dss , normalized breakdown voltage (v) i d = 1 ma
NDF02N60Z, ndd02n60z www. onsemi.com 4 typical characteristics 0.10 1.0 10 0 50 100 150 200 250 300 350 400 450 500 550 600 v ds , drain ? to ? source voltage (v) i dss , leakage ( a) figure 7. drain ? to ? source leakage current versus voltage t j = 150 c t j = 125 c 0 50 100 150 200 250 300 350 400 450 500 550 600 0 5 10 15 20 25 30 35 40 45 50 v ds , drain ? to ? source voltage (v) c, capacitance (pf) figure 8. capacitance variation t j = 25 c v gs = 0 v f = 1 mhz c iss c oss c rss 0.0 1.0 2.0 3.0 4.0 5.0 6.0 7.0 8.0 9.0 10.0 11.0 12.0 13.0 14.0 15.0 01234567891011 0 50 100 150 200 250 300 350 q g , total gate charge (nc) figure 9. gate ? to ? source voltage and drain ? to ? source voltage versus total charge v gs , gate ? to ? source voltage (v) v ds , drain ? to ? source voltage (v) q t q gd q gs v ds = 300 v i d = 2.4 a t j = 25 c v ds v gs 1.0 10 100 1000 1 10 100 r g , gate resistance ( ) t, time (ns) figure 10. resistive switching time variation versus gate resistance t d(off) t f t r t d(on) v dd = 300 v i d = 2.4 a v gs = 10 v 0.1 1.0 10.0 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 1.1 1. 2 125 c t j = 150 c 25 c ? 55 c v sd , source ? to ? drain voltage (v) figure 11. diode forward voltage versus current i s , source current (a)
NDF02N60Z, ndd02n60z www. onsemi.com 5 typical characteristics 0.01 0.1 1 10 100 0.1 1 10 100 1000 v ds , drain ? to ? source voltage (v) i d , drain current (a) figure 12. maximum rated forward biased safe operating area ndd02n60z v gs 30 v single pulse t c = 25 c 10 s 100 s 10 ms dc 1 ms r ds(on) limit thermal limit package limit 0.01 0.1 1 10 100 0.1 1 10 100 1000 v ds , drain ? to ? source voltage (v) i d , drain current (a) figure 13. maximum rated forward biased safe operating area NDF02N60Z v gs 30 v single pulse t c = 25 c 10 s 100 s 10 ms dc 1 ms r ds(on) limit thermal limit package limit 0.01 0.1 1 10 1e ? 06 1e ? 05 1e ? 04 1e ? 03 1e ? 02 1e ? 01 1e+00 1e+01 1e+02 1e+03 pulse time (s) r(t) (c/w) figure 14. thermal impedance (junction ? to ? case) for ndd02n60z r jc = 2.2 c/w steady state 50% (duty cycle) 20% 10% 5% 2% single pulse 1% pulse time (s) 50% (duty cycle) 20% 10% 5.0% 2.0% 1.0% single pulse r(t) (c/w) figure 15. thermal impedance (junction ? to ? ambient) for ndd02n60z r ja = 41 c/w steady state 1e ? 06 1e ? 05 1e ? 04 1e ? 03 1e ? 02 1e ? 01 1e+00 1e+01 1e+02 1e+03 0.01 0.1 1 10 100
NDF02N60Z, ndd02n60z www. onsemi.com 6 0.01 0.1 1 10 1e ? 06 1e ? 05 1e ? 04 1e ? 03 1e ? 02 1e ? 01 1e+00 1e+01 1e+02 1e+03 pulse time (s) r(t) (c/w) figure 16. thermal impedance (junction ? to ? case) for NDF02N60Z r jc = 4.9 c/w steady state 50% (duty cycle) 20% 10% 5% 2% single pulse 1% leads heatsink 0.110 min figure 17. isolation test diagram measurement made between leads and heatsink with all leads shorted together. *for additional mounting information, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d.
NDF02N60Z, ndd02n60z www. onsemi.com 7 ordering information order number package shipping ? NDF02N60Zg to ? 220fp (pb ? free, halogen ? free) 50 units / rail NDF02N60Zh to ? 220fp (pb ? free, halogen ? free) 50 units / rail ndd02n60z ? 1g ipak (pb ? free, halogen ? free) 75 units / rail ndd02n60zt4g dpak (pb ? free, halogen ? free) 2500 / tape and reel ?for information on tape and reel specifications, including part orientation and tape sizes, please refer to our tape and reel packaging specifications brochure, brd8011/d. marking diagrams a = location code y = year ww = work week g, h = pb ? free, halogen ? free package NDF02N60Zg or NDF02N60Zh ayww gate source drain 1 gate 2 drain 3 source 4 drain yww 2n 60zg 4 drain 2 drain 1 gate 3 source yww 2n 60zg to ? 220fp ipak dpak
NDF02N60Z, ndd02n60z www. onsemi.com 8 package dimensions to ? 220 fullpack, 3 ? lead case 221ah issue f dim min max millimeters d 14.70 15.30 e 9.70 10.30 a 4.30 4.70 b 0.54 0.84 p 3.00 3.40 e l1 --- 2.80 c 0.49 0.79 l 12.50 14.73 b2 1.10 1.40 q 2.80 3.20 a2 2.50 2.90 a1 2.50 2.90 h1 6.60 7.10 e q l1 b2 e d l p 123 b seating plane a a1 h1 a2 c notes: 1. dimensioning and tolerancing per asme y14.5m, 1994. 2. controlling dimension: millimeters. 3. contour uncontrolled in this area. 4. dimensions d and e do not include mold flash and gate protrusions. mold flash and gate protrusions not to exceed 0.13 per side. these dimensions are to be measured at outermost extreme of the plastic body. 5. dimension b2 does not include dambar protrusion. lead width including protrusion shall not exceed 2.00. 6. contours and features of the molded package body may vary within the envelop defined by dimensions a1 and h1 for manufacturing purposes. 2.54 bsc m 0.14 m a a b c e/2 m 0.25 m a b 3x c 3x b note 3 front view side view section d ? d alternate construction section a ? a a note 6 a dd note 6 h1
NDF02N60Z, ndd02n60z www. onsemi.com 9 package dimensions style 2: pin 1. gate 2. drain 3. source 4. drain 123 4 v s a k ? t ? seating plane r b f g d 3 pl m 0.13 (0.005) t c e j h dim min max min max millimeters inches a 0.235 0.245 5.97 6.35 b 0.250 0.265 6.35 6.73 c 0.086 0.094 2.19 2.38 d 0.027 0.035 0.69 0.88 e 0.018 0.023 0.46 0.58 f 0.037 0.045 0.94 1.14 g 0.090 bsc 2.29 bsc h 0.034 0.040 0.87 1.01 j 0.018 0.023 0.46 0.58 k 0.350 0.380 8.89 9.65 r 0.180 0.215 4.45 5.45 s 0.025 0.040 0.63 1.01 v 0.035 0.050 0.89 1.27 notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: inch. z z 0.155 ??? 3.93 ??? ipak case 369d issue c
NDF02N60Z, ndd02n60z www. onsemi.com 10 package dimensions dpak (single gauge) case 369aa issue b style 2: pin 1. gate 2. drain 3. source 4. drain b d e b3 l3 l4 b2 e m 0.005 (0.13) c c2 a c c z dim min max min max millimeters inches d 0.235 0.245 5.97 6.22 e 0.250 0.265 6.35 6.73 a 0.086 0.094 2.18 2.38 b 0.025 0.035 0.63 0.89 c2 0.018 0.024 0.46 0.61 b2 0.030 0.045 0.76 1.14 c 0.018 0.024 0.46 0.61 e 0.090 bsc 2.29 bsc b3 0.180 0.215 4.57 5.46 l4 ??? 0.040 ??? 1.01 l 0.055 0.070 1.40 1.78 l3 0.035 0.050 0.89 1.27 z 0.155 ??? 3.93 ??? notes: 1. dimensioning and tolerancing per asme y14.5m, 1994. 2. controlling dimension: inches. 3. thermal pad contour optional within di- mensions b3, l3 and z. 4. dimensions d and e do not include mold flash, protrusions, or burrs. mold flash, protrusions, or gate burrs shall not exceed 0.006 inches per side. 5. dimensions d and e are determined at the outermost extremes of the plastic body. 6. datums a and b are determined at datum plane h. 12 3 4 5.80 0.228 2.58 0.102 1.60 0.063 6.20 0.244 3.00 0.118 6.17 0.243 mm inches scale 3:1 *for additional information on our pb ? free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d. soldering footprint* h 0.370 0.410 9.40 10.41 a1 0.000 0.005 0.00 0.13 l1 0.108 ref 2.74 ref l2 0.020 bsc 0.51 bsc a1 h detail a seating plane a b c l1 l h l2 gauge plane detail a rotated 90 cw on semiconductor and the are registered trademarks of semiconductor components industries, llc (scillc) or its subsidia ries in the united states and/or other countries. scillc owns the rights to a number of pa tents, trademarks, copyrights, trade secret s, and other intellectual property. a listin g of scillc?s product/patent coverage may be accessed at www.onsemi.com/site/pdf/patent ? marking.pdf. scillc reserves the right to make changes without further notice to any products herein. scillc makes no warrant y, representation or guarantee regarding the suitability of it s products for any particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. ?typi cal? parameters which may be provided in scillc data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. all operating param eters, including ?typicals? must be validated for each customer application by customer?s technical experts. scillc does not convey any license under its patent rights nor the right s of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgic al implant into the body, or other applications intended to s upport or sustain life, or for any other application in which the failure of the scillc product could create a situation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer s hall indemnify and hold scillc and its officers , employees, subsidiaries, affiliates, and dist ributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that scillc was negligent regarding the design or manufac ture of the part. scillc is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyright laws and is not for resale in any manner. publication ordering information n. american technical support : 800 ? 282 ? 9855 toll free usa/canada europe, middle east and africa technical support: phone: 421 33 790 2910 japan customer focus center phone: 81 ? 3 ? 5817 ? 1050 NDF02N60Z/d literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 303 ? 675 ? 2175 or 800 ? 344 ? 3860 toll free usa/canada fax : 303 ? 675 ? 2176 or 800 ? 344 ? 3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : www.onsemi.com order literature : http://www.onsemi.com/orderlit for additional information, please contact your local sales representative
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